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Bien's Integrated Circuit Design Lab School of Electrical & Computer Engineering in UNIST

Prof. Bien

By 이승하2012-04-05
 Prof. Bien--

Abstract :

6+ years of IC design industry experience as a team leader as well as an individual contributor in a major semiconductor company and a start-up environment. Extensive design experience in high-speed broadband transceivers, equalizers, baseband circuitries as well as CMOS RF front end circuits. Experiences with 0.35-um SiGe BiCMOS and 0.25/0.18/0.13-um, 110nm, 90nm, & 65nm CMOS IC design processes.

Current research interest includes traditional analog/RF IC design, all-digital pulse generator for impulse radio ultra-wideband (IR-UWB), adaptive antenna-locked loop circuits for efficient wireless power trans, and circuits for electric vehicles including high-voltage inverters, DC-DC converters, and Battery Management System (BMS).

 

Educations :

Ph.D. Electrical & Computer Engineering

Georgia Institute of Technology, Atlanta, GA, December 2006

Dissertation: “Reconfigurable Equalization for 10-Gb/s Serial Data Links in a

                 0.18-um CMOS Technology”

Advisor: Dr. Joy Laskar

 

 

MSECE Electrical & Computer Engineering

Georgia Institute of Technology, Atlanta, GA, May 2000

Advisor: Dr. Phillip E. Allen

 

BSEE Electronics Engineering,

Yonsei University, Seoul, Korea, 1997

Advisor: Dr. Woo-Yong Choi

 

 

 

Professional Work Experiences:

 

Ulsan National Institute of Science and Technology (UNIST), Ulsan, Korea (03/2009-Present)

Assistant Professor, School of Electrical and Computer Engineering

Director, IT Convergence Research Center

Director, Green Electric Vehicle Research Center

 

 

Antenna Locked Loop circuit for wireless power transfers in CMOS technology sponsored by Ministry of Science and Education

IR-UWB transceiver in 0.13um CMOS technology with all digital pulse generator including burst pulse function and channel selectivity sponsored by Ministry of Knowledge and Economics

Wireless Charging System for flexible Li-ion batteries sponsored by Ministry of Science and Education

Contactless brake system and 24GHz AM Radar sensor development sponsored by Ulsan Science Park

Highly efficient wireless charing system for Green Electric Vehicle

 

 

 

Staccato Communications, San Diego, CA (03/2007-02/2009)

Senior Analog/Mixed-Signal IC Design Engineer

Supervisor: Dr. Dan Meacham                 

 

•Developed Ultra-Wideband (UWB) single chip transceiver IC for Wireless USB and Bluetooth 3.0 applications with TSMC 65nm CMOS technology

•Design of various CMOS RF front-end circuits and mixed-signal baseband circuitries including 32KHz Low Power Oscillator (<30uW), 528MHz PLL Frequency Doubler, Local Oscillator Leakage Detector (Receiver Signal Strength Indicator (RSSI) with log amp), 5-bit Successive Approximation Register (SAR) ADC for 528MHz PLL & 16GHz PLL. 16-GHz Colpitts differential low-phase noise (-84dBc @ 100kHz) VCO.

 

 

 

Georgia Institute of Technology, Atlanta, GA  (01/2003-12/2006)

Graduate Research Assistant, Microwave Applications Group (MAG)

Advisor: Dr. Joy Laskar                 

 

•High-speed (>10-Gb/s) broadband communication transceiver, equalizer, and cross-talk cancellation IC design with channel characterization, system simulation, circuit design, layout, and measurement experience. These ICs typically improve bit-error rate (BER) from 10-4 To 10-12, and extend 5X data reach.

•Teaching experience for three semesters on graduate level RF IC design course and undergraduate senoior level RF IC design laboratory course at Georgia Tech during year 2005 and 2006. Prepared lecture materials, design projects, provided 1/3 of the lectures. Participated in the evaluation and grading procedures.

•Design focus to improve signal integrity, data throughput, and data reach for given channel limitation and enable 10-Gb/s data throughput over 20-inch legacy backplanes, 500m-MMF, and 400-km SMF implemented in 0.13-m and 0.18-m CMOS technology.

 

 

      

Quellan, Inc., Atalnta, GA (01/2003-12/2004)

Senior IC Design Engineer, Products Engineering Group

Supervisor: Dr. Bruce Schmukler

 

•Research and development on active silicon solutions for multi-giga bit broadband communication I/O bottlenecks including chip-to-chip and board-to-board interconnections.

•Designed CMOS building blocks that provide longer-reach, lower BER (Bit-Error-Rate), higher data throughput for pre-existing legacy backplane channels.

•Design work includes 5-Gb/s equalizer products and 6.25-Gb/s active cross-talk cancellation products.

 

 

                

Agilent Technologies, San Jose, CA (05/2000-12/2002)

IC Design Engineer, Semiconductor Products Group, R & D

Supervisor: Dr. Myung-hee Lee

 

•Designed innovative CML driver for Very-Short Reach, Multi-Mode Fiber, OC-48 parallel optics product resulting in best eye-diagram mask margin performance product in current market.

•Designed mixed-signal IC’s for optical networks solutions in Bi-CMOS technologies ranging from 2.5Gb/s to 3.125Gb/s. FP laser driver IC, 4-channel & 12-channel parallel optics, single channel optics products developments. Experiences the whole cycle from conceptual review to product releases.

 

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